C65SPACE

批量生产

用于空间应用的抗辐照65nm CMOS技术平台

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产品概述

描述

The C65SPACE is fabricated on a proprietary 65nm, 7 metal layers CMOS process intended for use with a core voltage of 1.2V ±0.10V.The ST standard-cells, memories and PLL have been designed and characterized to be compatible with each other.
  • 所有功能

    • Process
      • STMicroelectronics C65SPACE (65nm CMOS)
      • 3.3V IO gate oxide GO2 (5nm)
      • 1.2V core gate oxide GO1 (1.8nm), triple VT transistors
      • 7 copper metallization,5 thin and 2 thick
      • Low-K inter-metallic dielectrics for thin metal layers
      • High density SRAMs
      • Compatible with flip-chip and wire bonding packaging
    • Radiations
      • SEL-free up to LET = 60Mev/mg/cm2 at 125°C Tj and Vdd max
      • SEE hardened library
      • Tested up to a total dose of 300 krads (Si)
    • Reliability
      • Library cells models with 20 years aging
      • Transistor models including aging alteration
      • ESD better than:
        • 2kV in HBM (Class 2 / MIL-STD-883H)
        • 150V in MM
        • 250V in CDM
    • Library offer
      • Comprehensive library of standard logic with PVT and aging corners models
      • IO pad libraries provide interfaces at 3.3V +/-0.30V, 2.5V+/-0.25V and 1.8V +/-0.15V
      • High speed IO Pad LVDS supplied at 2.5V +/-0.25V up to 650Mbps
      • Cold sparing IOs with single/double row support
      • Memories generation: single port SRAM, ROM, Dual port SRAMs, BIST library, EDAC library
      • Wide-range PLLs 1.2GHz with multi-phase outputs
      • 6.25Gbit/s high speed serial links (HSSL)
    • Design flow
      • An ST customized design flow (RTL to GDS) invoking commercial solutions (Synopsys, Cadence, Mentor…) is available for partners and certified design houses:
        • Front-End kit from RTL to gates based
        • SiPKit for IO ring generation
        • FFKit for place and route
        • SignOffKit for final verification before tape-out
      • For customer owned tools (COT) flow, ST provides the C65SPACE design platform along with the DRM and sign-off kit.

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工业

质量与可靠性

产品型号 Marketing Status 封装 等级规格 符合RoHS级别 材料声明**
C65SPACE
批量生产
- 工业 -

C65SPACE

Package:

-

Material Declaration**:

Marketing Status

批量生产

Package

-

Grade

Industrial

RoHS Compliance Grade

-

(**) st.com上提供的材料声明表单可能是基于包装系列中最常用的封装的通用文档。因此,它们可能不是100%适用于特定的设备。有关特定设备的信息,请联系 销售支持

样片和购买

产品型号
从分销商订购
从ST订购
供货状态
ECCN (US)
ECCN (EU)
包装类型
封装
温度(ºC) 一般描述
Budgetary Price (US$)*/Qty
更多信息
最小值
最大值
C65SPACE 无法联系到经销商,请联系我们的销售办事处
批量生产
- - - - - - Rad hard 65nm CMOS technology platform for space applications
更多信息

Agency Qualification:

ESA

Agency Generic Spec:

ESCC2269000

Country of Origin:

-

C65SPACE

供货状态

批量生产

ECCN (US)

-

ECCN (EU)

-

包装类型

-

封装

-

Operating Temperature (°C)

(最小值)

-

(最大值)

-

一般描述

Rad hard 65nm CMOS technology platform for space applications

Agency Qualification

ESA

Agency Generic Spec

ESCC2269000

Country of Origin

-

(*) 建议转售单价(美元)仅用于预算用途。如需以当地货币计价的报价,请联系您当地的 ST销售办事处 或我们的 经销商